General description
The 74LVCH322245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features four output enable (nOE) inputs for easy cascading and four send/receive (nDIR) inputs for direction control. Pin nOE controls the outputs so that the buses are effectively isolated. The device is designed with 30 Ω series termination resistors in both HIGH and LOW output stages to reduce line noise.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.
To ensure the high-impedance state during power-up or power-down, pin nOE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.

FEATUREs
■ 5 V tolerant inputs/outputs for interfacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 3.6 V
■ CMOS low power consumption
■ MULTIBYTE flow-through standard pin-out architecture
■ Low inductance multiple power and ground pins for minimum noise and ground bounce
■ Direct interface with TTL levels
■ Inputs accept voltages up to 5.5 V
■ All data inputs have bus hold
■ Integrated 30 Ω termination resistors
■ Complies with JEDEC standard JESD8-B / JESD36
■ ESD protection:
   ◆ HBM EIA/JESD22-A114-B exceeds 2000 V
   ◆ MM EIA/JESD22-A115-A exceeds 200 V
■ Specified from −40 °C to +85 °C
■ Packaged in plastic fine-pitch ball grid array package