General description
The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two sets of D-type latches for temporary storage of the data flow in either direction.
   
Features and benefits
• CMOS low power consumption
• Direct interface with TTL levels
• MULTIBYTE flow-through standard pin-out architecture
• Back-to-back registers for storage
• Output drive capability 50 Ω transmission lines at 85 °C
• All data inputs have bushold
• Low inductance multiple VCC and GND pins
    for minimize noise and ground bounce
• Current drive ±24 mA at VCC = 3.0 V.
• 3-state non-inverting outputs for bus oriented applications
• Complies with JEDEC standards:
    – JESD8-5 (2.3 V to 2.7 V)
    – JESD8B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
    – HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
    – CDM JESD22-C101E exceeds 1000 V