LTM4656 查看數據表（PDF） - Analog Devices
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LTM4656 Datasheet PDF : 28 Pages
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LTM4656/LTM4656-1
APPLICATIONS INFORMATION
When the TMR pin reaches 1.275V, the FLT pin is latched
low as an early warning of impending shutdown, then it
continues unabated until the TMR reaches 1.375V, pro-
ducing an early warning period given by:
tFLT
= 0.01µF
•
1.275V –
ITMR
0.5V
t WARN
= 0.01µF
•
1.375V – 1.275V
ITMR
ITMR taken from Figure 1.
Because ITMR is a function of VIN–SENSE1, the exact time
in current limit depends upon the input waveform and the
time required for the output current to come into regula-
tion. Testing of the overall solution should be verified, and
compared to the MOSFET SOA curves.
COOLDOWN PHASE
Cooldown behavior is initiated by overcurrent. During
the cooldown phase, the timer continues to charge from
1.375V to 4.3V with 2µA, and then discharges back down
to 0.5V with 2µA, for a total equivalent voltage swing of
6.725V. The cooldown time is given by:
tCOOL
= 0.01µF
•
6.725V
2µA
= 33.6ms
This long cool time assures that during retry the MOSFET
does not overheat.
The LTM4656 will auto-retry at the end of the cooldown
phase. Retry is automatically initiated. The cooldown phase
may be interrupted in the LTM4656 by pulling SHDN low
for at least 10ms.
The FLT pin goes high in shutdown and is cleared high
when power is first applied to VIN.
Brief overcurrent conditions interrupt the operation of
the timer. If the TMR pin has not yet reached 1.275V
when fault drops out of current limit, the timer capacitor
is discharged back to 0.5V with a 2µA current sink. If the
TMR voltage crosses 1.275V, then FLT is set low. If the
overcurrent abates before reaching 1.375V, the timer
capacitor discharges with 2µA back to 0.5V, whereupon
FLT resets high. If several short overcurrent events occur
in rapid succession, the timer capacitor will integrate the
charging and discharging currents. Figure 20 shows an
overcurrent fault wave from and a retry cycle.
MIN MOSFET SOA CURVE
Figure 3 shows the MIN MOSFET SOA curve. This curve
can be compared to the period of time the MIN Power
MOSFET stays on during a fault condition with an over-
current flowing through MIN, and the worse-case voltage
across the MIN MOSFET.
400
100
10
1ms
10ms
1
THIS AREA IS
LIMITED BY
RDS(ON)
0.1 SINGLE PULSE
TJ = MAX RATED
TA = 25°C
0.01 RθJA = 125°C/W
0.01
0.1
1
100ms
1s
10s
DC
10 100 200
VDS, DRAIN TO SOURCE VOLTAGE (V)
4656 F03
Figure 3. MIN Internal MOSFET SOA Curves
For more information www.analog.com
Rev. 0
11
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