APU429 查看數據表（PDF） - APLUS INTEGRATED CIRCUITS
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APU429 Datasheet PDF : 18 Pages
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Pad Assignment
Chip size : 2620 x 2050 Pm
Pad size : 100 x 100 Pm
Pad window : 90 x 90 Pm
Pad pitch : min. 120 Pm
<
10
20
APU429
70
1
60
30
40
50
;
Note: The substrate of die must connect to GND.
Pad Coordinates
Pad No. Pad Name
1
CFIN
2
CFOUT
3
XTIN
4
XTOUT
5
BAK
6
TESTA
7
RESET
8
INT
9
S1
10
S2
11
S3
Preliminary
X
1971.50
1785.25
1665.25
1545.25
1425.25
1305.25
1185.25
1065.25
945.25
825.25
705.25
Y
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
Pad No.
36
37
38
39
40
41
42
43
44
45
46
2
Pad Name
SEG13/KO3
SEG14/KO4
SEG15/KO5
SEG16/KO6
SEG17/KO7
SEG18/KO8
SEG19/KO9
SEG20/KO10
SEG21/KO11
SEG22/KO12
SEG23/KO13
X
75.25
225.25
345.25
465.25
585.25
705.25
825.25
945.25
1065.25
1185.25
1305.25
Y
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
Ver. 0.0
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