Section Number
Title
Page
5.8.3
5.8.4
5.8.5
5.8.6
5.8.7
5.8.8
5.8.9
5.8.10
System Background Debug Force Reset Register (SBDFR) ..........................................73
System Options Register (SOPT1) .................................................................................73
System Options Register (SOPT2) .................................................................................74
System Device Identification Register (SDIDH, SDIDL) ..............................................75
System Real-Time Interrupt Status and Control Register (SRTISC) .............................76
System Power Management Status and Control 1 Register (SPMSC1) .........................77
System Power Management Status and Control 2 Register (SPMSC2) .........................78
System Power Management Status and Control 3 Register (SPMSC3) .........................79
Chapter 6
Parallel Input/Output
6.1 Pin Behavior in Stop Modes ............................................................................................................83
6.2 Parallel I/O Registers .......................................................................................................................83
6.2.1 Port A Registers ..............................................................................................................83
6.2.1.1 Port A Data Registers (PTAD) ........................................................................84
6.2.1.2 Port A Data Direction Registers (PTADD) .....................................................84
6.2.2 Port A Control Registers ................................................................................................85
6.2.2.1 Internal Pullup Enable (PTAPE) .....................................................................85
6.2.2.2 Output Slew Rate Control Enable (PTASE) ...................................................86
6.2.2.3 Output Drive Strength Select (PTADS) ..........................................................86
6.2.3 Port B Registers ..............................................................................................................87
6.2.3.1 Port B Data Registers (PTBD) ........................................................................87
6.2.3.2 Port B Data Direction Registers (PTBDD) .....................................................88
6.2.4 Port B Control Registers .................................................................................................88
6.2.4.1 Internal Pullup Enable (PTBPE) .....................................................................88
6.2.4.2 Output Slew Rate Control Enable (PTBSE) ...................................................89
6.2.4.3 Output Drive Strength Select (PTBDS) ..........................................................90
6.2.5 Port C Registers ..............................................................................................................90
6.2.5.1 Port C Data Registers (PTCD) ........................................................................91
6.2.5.2 Port C Data Direction Registers (PTCDD) .....................................................91
6.2.6 Port C Control Registers .................................................................................................91
6.2.6.1 Internal Pullup Enable (PTCPE) .....................................................................92
6.2.6.2 Output Slew Rate Control Enable (PTCSE) ...................................................93
6.2.6.3 Output Drive Strength Select (PTCDS) ..........................................................93
Chapter 7
Keyboard Interrupt (S08KBIV2)
7.1 Introduction .....................................................................................................................................95
7.1.1 Features ...........................................................................................................................97
7.1.2 Modes of Operation ........................................................................................................97
7.1.2.1 KBI in Wait Mode ...........................................................................................97
7.1.2.2 KBI in Stop Modes .........................................................................................97
7.1.2.3 KBI in Active Background Mode ...................................................................97
7.1.3 Block Diagram ................................................................................................................97
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
Freescale Semiconductor
11
PRELIMINARY