CY7C4265-10ASXC 查看數據表（PDF） - Cypress Semiconductor
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CY7C4265-10ASXC Datasheet PDF : 23 Pages
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Pin Configurations
CY7C4255, CY7C4265, CY7C4265A
Figure 1. 64-Pin TQFP/STQFP (Top View)
D15
1
48
Q14
D14
2
47
Q13
D13
3
46
GND
D12
4
D11
5
45
Q12
44
Q11
D10
6
D9
7
CY7C4255
43
VCC
42
Q10
D8
D7
8
9
CY7C4265/65A 41
40
Q9
GND
D6
10
39
Q8
D5
11
38
Q7
D4
12
37
Q6
D3
13
36
Q5
D2
14
35
GND
D1
15
34
Q4
D0
16
33
VCC
Pin Description
The CY7C4255/65/65A provides five status pins. These pins are
decoded to determine one of five states: Empty, Almost Empty,
Half Full, Almost Full, and Full. The Half Full flag shares the WXO
pin. This flag is valid in the standalone and width-expansion
configurations. In the depth expansion, this pin provides the
expansion out (WXO) information that is used to signal the next
FIFO when it is activated.
The Empty and Full flags are synchronous, that is, they change
state relative to either the Read Clock (RCLK) or the Write Clock
(WCLK). When entering or exiting the Empty states, the flag is
updated exclusively by the RCLK. The flag denoting Full states
is updated exclusively by WCLK. The synchronous flag archi-
tecture guarantees that the flags remain valid from one clock
cycle to the next. The Almost Empty/Almost Full flags become
synchronous if the VCC/SMODE is tied to VSS. All configura-
tions are fabricated using an advanced 0.5μ CMOS
technology. Input ESD protection is greater than 2001V, and
latch up is prevented by the use of guard rings.
Table 1. Selection Guide
Description
Maximum Frequency (MHz)
Maximum Access Time (ns)
Minimum Cycle Time (ns)
Minimum Data or Enable Set-Up (ns)
Minimum Data or Enable Hold (ns)
Maximum Flag Delay (ns)
Active Power Supply
Current (ICC1) (mA)
Commercial
Industrial
7C4255/65-10
100
8
10
3
0.5
8
45
50
7C4255/65/65A-15
66.7
10
15
4
1
10
45
50
7C4255/65-25
40
15
25
6
1
15
45
50
7C4255/65-35
28.6
20
35
7
2
20
45
50
Table 2. Density and Package
Description
Density
Package
CY7C4255
8K x 18
64-pin TQFP, STQFP
CY7C4265/65A
16K x18
64-pin TQFP, STQFP
Document #: 38-06004 Rev. *E
Page 2 of 23
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