74VCX16373MTD 查看數據表（PDF） - ON Semiconductor
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74VCX16373MTD
ON Semiconductor
74VCX16373MTD Datasheet PDF : 12 Pages
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Connection Diagrams
Pin Assignment for TSSOP
Pin Assignment for FBGA
(Top Thru View)
Pin Descriptions
Pin Names
OEn
LEn
I0–I15
O0–O15
NC
Description
Output Enable Input (Active LOW)
Latch Enable Input
Inputs
Outputs
No Connect
FBGA Pin Assignments
1
2
3
4
5
6
A
O0
NC OE1 LE1 NC
I0
B
O2
O1
NC NC
I1
I2
C
O4
O3
VCC VCC
I3
I4
D
O6
O5 GND GND I5
I6
E
O8
O7 GND GND I7
I8
F
O10
O9 GND GND
I9
I10
G
O12
O11
VCC VCC
I11
I12
H
O14
O13
NC
NC
I13
I14
J
O15 NC OE2 LE2 NC
I15
Truth Tables
Inputs
LE1
OE1
I0–I7
X
H
X
H
L
L
H
L
H
L
L
X
Inputs
LE2
OE2
I8–I15
X
H
X
H
L
L
H
L
H
L
L
X
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial (HIGH or LOW, inputs may not float)
Z High Impedance
O0 Previous O0 before HIGH-to-LOW of Latch Enable
Outputs
O0–O7
Z
L
H
O0
Outputs
O8–O15
Z
L
H
O0
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