ISL95871C 查看數據表（PDF） - Renesas Electronics
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ISL95871C Datasheet PDF : 26 Pages
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ISL95871C
Pin Configuration
ISL95871C
(50 LD 5x7 QFN)
TOP VIEW
AGND 1
ACOK 2
VFB 3
CSON 4
CSOP 5
DCIN 6
NC 7
AGND 8
VDDP 9
VDDP 10
PHASE 11
PGND 12
PGND 13
PGND 14
PGND 15
PGND 16
50 49 48 47 46 45 44 43 42
AGND
51
VDDP
52
UDGC54A3I9NTE3
PHASE
P5H4 ASE7
VIN
55
17 18 19 20 21 22 23 24 25
41 AGND
40 ACIN
39 NC
38 CSIP
37 AGND
36 CSIN
35 VDD
34 BOOT
33 UGATE
32 UGATE
31 VIN
30 VIN
29 VIN
28 VIN
27 VIN
26 VIN
Pin Descriptions
PIN NUMBER
1, 8, 37, 51
SYMBOL
AGND
2
ACOK
3
4
5
6
7, 21, 39, 45, 50
9, 10, 52
VFB
CSON
CSOP
DCIN
NC
VDDP
11, 17, 18, 19, 20, 54
12, 13, 14, 15, 16
PHASE
PGND
DESCRIPTION
Analog Ground. Connect directly to the backside paddle. Connect to PGND and the system ground plane under
the IC.
AC-Adapter Detection Output. This open drain output is high impedance when ACIN is greater than 3.2V. The
ACOK output remains low when the ISL95871C is powered down. Connect a 10k pull-up resistor from ACOK
to VDDSMB. Range: 0V to 5V.
Battery Voltage Remote Sense. Connect to the battery pack positive terminal.
Charge Current-Sense Negative Input. Range: zero to battery voltage.
Charge Current-Sense Positive Input. Range: zero to battery voltage.
Charger Bias Supply Input. Bypass DCIN with a 0.1µF capacitor to AGND. Range: zero to adapter voltage.
No Connection. Pins 7, 21, 39, 45 and 50 are not connected.
Linear Regulator Output. VDDP is the output of the 5.2V linear regulator supplied from DCIN. VDDP also
directly supplies the LFET gate driver and the BOOT strap diode. Bypass with a 1µF ceramic capacitor from
VDDP to PGND. Range: zero to 5.3V.
Output inductor connection. Connected to the source of the internal high-side N-Channel MOSFET Source and
low-side N-Channel MOSFET Drain. Range: 1 diode drop below ground to 1 diode drop above adapter voltage.
Power Ground. Connect PGND to the source of the low side MOSFET and to the system ground plane.
FN6856 Rev 2.00
June 8, 2011
Page 2 of 26
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