74HC164-Q100(2013) 查看數據表（PDF） - Nexperia B.V. All rights reserved
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74HC164-Q100
(Rev.:2013)
(Rev.:2013)
Nexperia B.V. All rights reserved
74HC164-Q100 Datasheet PDF : 18 Pages
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Nexperia
74HC164-Q100; 74HCT164-Q100
8-bit serial-in, parallel-out shift register
VI
MR input
GND
VI
CP input
GND
VOH
Qn output
VOL
VM
tW
frec
tPHL
VM
VM
001aac427
(1) Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation
delays and the master reset to clock (CP) removal time
VI
CP input
GND
VI
Dn input
GND
VM
t su
th
VM
t su
th
VOH
Qn output
VOL
VM
001aac428
(1) Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 9. Waveforms showing the data set-up and hold times for Dn inputs
74HC_HCT164_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 August 2013
© Nexperia B.V. 2017. All rights reserved
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