EL5130IS 查看數據表（PDF） - Renesas Electronics
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EL5130IS Datasheet PDF : 12 Pages
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EL5130, EL5131
Package Outline Drawing
P5.064A
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 0, 2/10
1.90
D
A
5
4
PIN 1
INDEX AREA
2.80 3
0.15 C D
2x
B
2
0.95
0.40 ±0.05
3
0.20 M C A-B D
TOP VIEW
0.20 C
2x
5
2.90
0.15 C A-B
2x
1.14 ±0.15
SIDE VIEW
0.05-0.15
(0.60)
0-3°
0.08-0.20
1.60
35
SEE DETAIL X
END VIEW
(0.60)
10° TYP
(2 PLCS)
1.45 MAX
C
0.10 C
SEATING PLANE
DETAIL "X"
H
(0.25) GAUGE
PLANE
0.45±0.1 4
(2.40)
(1.20)
(0.95)
(1.90)
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to ASME Y14.5M-1994.
3. Dimension is exclusive of mold flash, protrusions or gate burrs.
4. Foot length is measured at reference to guage plane.
5. This dimension is measured at Datum “H”.
6. Package conforms to JEDEC MO-178AA.
FN7381 Rev 5.00
May 28, 2010
Page 12 of 12
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