Low-Voltage, CMOS Analog
Multiplexers/Switches
______________________________________________Test Circuits/Timing Diagrams
V+
VADD
V+
ADDC
NO0
V+
ADDB
ADDA
NO1–NO6
50Ω
MAX4051/A NO7
V-
INH
COM
GND V-
300Ω
V-
VOUT
35pF
V+
VADD
V+
ADDA
NO0
V+
ADDB
NO1–NO2
MAX4052/A NO3
V-
50Ω
INH
COM
GND V-
300Ω
V-
VOUT
35pF
V+
VADD
V+
ADD
NO
V-
MAX4053/A NC
V+
50Ω
INH
COM
GND V-
300Ω
V-
VOUT
35pF
V+
VADD
0V
VNO0
VOUT
0V
VNO7
tTRANS
V+
VADD
0V
VNO0
VOUT
0V
VNO3
tTRANS
V+
VADD
0V
VNC
VOUT
0V
VNO
tTRANS
50%
90%
50%
90%
50%
90%
90%
tTRANS
90%
tTRANS
90%
tTRANS
V- = 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
Figure 2. Address Transition Time
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