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74ALVCH16501DL 查看數據表(PDF) - NXP Semiconductors.

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产品描述 (功能)
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74ALVCH16501DL
NXP
NXP Semiconductors. 
74ALVCH16501DL Datasheet PDF : 18 Pages
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NXP Semiconductors
74ALVCH16501
18-bit universal bus transceiver; 3-state
LExx VI
input
CPxx
input GND
VOH
An, Bn
output
VOL
1 / fmax
VM
VM
tW
tPHL
VM
VM
tPLH
VM
001aal720
Fig 8.
Measurement points are given in Table 8.
VOL and VOH are typical output levels that occur with the output load.
Propagation delay, latch enable input (LEAB, LEBA) and clock pulse input (CPAB, CPBA) to data output,
and pulse width
VI
An, Bn
input
GND
VI
CPxx, LExx
input
GND
VM
tsu
VM
th
VM
VM
tsu
VM
th
VM
001aal722
Measurement points are given in Table 8.
Fig 9. Data set-up and hold times (An, Bn inputs to LEAB, LEBA, CPAB and CPBA inputs)
Table 8. Measurement points
Supply voltage Input
VCC
2.3 V to 2.7 V
2.7 V
VI
VCC
2.7 V
3.0 V to 3.6 V
2.7 V
VM
0.5
2.7 V
2.7 V
Output
VM
0.5
1.5 V
1.5 V
VX
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VY
VOH 0.15 V
VOH 0.3 V
VOH 0.3 V
74ALVCH16501_3
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 2 April 2010
© NXP B.V. 2010. All rights reserved.
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