SI4136-BT 查看數據表（PDF） - Silicon Laboratories

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SI4136-BT

ISM RF SYNTHESIZER WITH INTEGRATED VCOS FOR WIRELESS COMMUNICATIONS

Silicon Laboratories 

Si4136

Table 5. RF and IF Synthesizer Characteristics (Continued)

(VDD = 3.0 to 3.6 V, TA = –40 to 85°C)

Parameter1

RF1 Harmonic Suppression

Symbol

Test Condition

Min

Typ

Max

Unit

Second Harmonic

—

–28 –20

dBc

RF2 Harmonic Suppression

—

–23 –20

dBc

IF Harmonic Suppression

—

–26 –20

dBc

RFOUT Power Level

RFOUT Power Level

IFOUT Power Level

RF1 Output Reference Spurs

ZL = 50 Ω, RF1 active –15

–7

0

dBm

ZL = 50 Ω, RF2 active –15

–9

0

dBm

ZL = 50 Ω

–7

–3

1

dBm

Offset = 1 MHz

—

–63

—

dBc

Offset = 2 MHz

—

–68

—

dBc

Offset = 3 MHz

—

–70

—

dBc

RF2 Output Reference Spurs

Offset = 1 MHz

—

–63

—

dBc

Offset = 2 MHz

—

–68

—

dBc

Offset = 3 MHz

—

–70

—

dBc

Power Up Request to Synthesizer

Ready3 Time

tpup

Figures 4, 5

—

80

100

µs

fφ > 500 kHz

Power Up Request to Synthesizer

Ready3 Time

tpup

Figures 4, 5

—

40/fφ 50/fφ

fφ ≤ 500 kHz

Power Down Request to Synthesizer

tpdn

Off4 Time

Figures 4, 5

—

—

100

ns

Notes:

1. fφ(RF) = 1 MHz, fφ(IF) = 1 MHz, RF1 = 2.4 GHz, RF2 = 2.1 GHz, IFOUT = 800 MHz, LPWR = 0, for all parameters

unless otherwise noted.

2. RF VCO tuning range limits are fixed by inductance of internally bonded wires.

3. From power up request (PWDNB↑ or SENB↑ during a write of 1 to bits PDIB and PDRB in Register 2) to RF and IF

synthesizers ready (settled to within 0.1 ppm frequency error).

4. From power down request (PWDNB↓, or SENB↑ during a write of 0 to bits PDIB and PDRB in Register 2) to supply

current equal to IPWDN.

Rev. 1.0

9

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