LC74731W, LC74732W
• Second byte (2)
DA0 to 7 Register
State
Content
Function
7
—
0
6
—
0
5
—
0
0 Character code (00xx to 1Fxx (hexadecimal))
4
c12
1
0
3
c11
1
0
2
c10
1
0
1
c09
1
0
0
c08
1
Note that all registers are set to 0 when these ICs are reset by the RST pin.
Notes
External ROM upper address
• Second byte (3)
DA0 to 7 Register
7
c07
6
c06
5
c05
4
c04
3
c03
2
c02
1
c01
0
c00
State
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Content
Function
Character code (00 to FF (hexadecimal))
FE (hexadecimal): Space character
FF (hexadecimal): Transparent space character
Note that all registers are set to 0 when these ICs are reset by the RST pin.
Continuous mode (cleared by setting CS high) operates as follows according to IR.
When internal ROM is specified: 1-1 1-2-1
1-2-2
1-2-3
1-2-3
When external ROM is specified: 1-1 1-2-1
1-2-2
1-2-3
1-2-2
1-2-3
1-2-3
Notes
External ROM lower address
Internal ROM address
1-2-3
1-2-2
1-2-3
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