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FIN1001

3.3 V LVDS 1-Bit, High-Speed Differential Driver

ON Semiconductor 

March 2017

FIN1001

3.3 V LVDS 1-Bit, High-Speed Differential Driver

Features

 Greater than 600 Mbs Data Rate

 3.3 V Power Supply Operation

 0.5 ns Maximum Pulse Skew

 1.5 ns Maximum Propagation Delay

 Low Power Dissipation

 Power-Off Protection

 Meets or exceeds TIA/EIA-644 LVDS Standard

 Flow-through pin-out simplifies PCB Layout

 5-Lead SOT23 package saves Space

Description

This single driver is designed for high-speed

interconnects utilizing Low Voltage Differential Signaling

(LVDS) technology. The driver translates LVTTL levels

to LVDS levels with a typical differential output swing of

350 mV which provides low EMI at ultra low power

dissipation even at high frequencies. This device is

ideal for high-speed transfer of clock or data. The

FIN1001 can be paired with its companion receiver, the

FIN1002, or with any other LVDS receiver.

Ordering Information

Part Number

FIN1001M5X

Operating

Temperature

Range

-40 to +125°C

Package

Packing Method

Packing

Quantity

5-Lead SOT23, JEDEC MO-178, 1.6 mm Tape & Reel

3000

Connection Diagram

© 2002 Semiconductor Components Industries, LLC.

FIN1001 • Rev. 1.4

Figure 1. Top View

www.fairchildsemi.com

www.onsemi.com

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