74LV4052 查看數據表（PDF） - NXP Semiconductors.

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74LV4052

Dual 4-channel analog multiplexer/demultiplexer

NXP Semiconductors. 

Nexperia

74LV4052

Dual 4-channel analog multiplexer/demultiplexer

6. Functional description

Table 3. Function table[1]

Input

E

S1

S0

L

L

L

L

L

H

L

H

L

L

H

H

H

X

X

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.

7. Limiting values

Channel on

nY0 and nZ

nY1 and nZ

nY2 and nZ

nY3 and nZ

none

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).

Symbol

Parameter

Conditions

Min

Max Unit

VCC

supply voltage

[1]

0.5

+7.0 V

IIK

input clamping current VI < 0.5 V or VI > VCC + 0.5 V

[2]

-

20

mA

ISK

switch clamping current VSW < 0.5 V or VSW > VCC + 0.5 V [2]

-

20

mA

ISW

switch current

VSW > 0.5 V or VSW < VCC + 0.5 V; [2]

-

source or sink current

25

mA

Tstg

storage temperature

Ptot

total power dissipation Tamb = 40 C to +125 C

SO16 package

65

[3]

-

+150 C

500

mW

SSOP16 and TSSOP16 package

-

500

mW

[1] To avoid drawing VCC current out of terminal nZ, when switch current flows into terminals nYn, the voltage drop across the bidirectional

switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC current flows out of terminals nYn. In this case, there is

no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed VCC or VEE.

[2] The minimum input voltage rating may be exceeded if the input current rating is observed.

[3] For SO16 package: above 70 C the value of Ptot derates linearly with 8 mW/K.

For SSOP16 and TSSOP16 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.

74LV4052

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 5 — 17 March 2016

© Nexperia B.V. 2017. All rights reserved

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