580M-01ILFT 查看數據表（PDF） - Integrated Device Technology
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580M-01ILFT Datasheet PDF : 13 Pages
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ICS580-01
GLITCH-FREE CLOCK MULITPLEXER
CLOCK MULTIPLEXER
Parameter Symbol Conditions
Input Low Voltage
VIL INA and INB only
Note 3
Input Capacitance
CIN
Output High Voltage VOH IOH = -12 mA
Output Low Voltage VOL IOL = 12 mA
Short Circuit
IOS
Current
On-chip pull-up
Resistor
RPU Non-clock inputs
Pull-up to VDDC
Min.
VDDC-0.5
Typ.
Max. Units
(VDDC/2)-1 V
4
pF
V
0.5
V
±70
mA
250
kΩ
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40 to +85° C
Parameter
Symbol Conditions
Min. Typ.
Input Frequency
INA and INB, Note 1
fIN VDDC = 5V
VDDC = 3.3V
VDDC = 2.7V
1/timeout
1/timeout
1/timeout
Propagation Delay
INA or INB to output
Transition Detector
Timeout, DIV = 0
VDDC = 5V
VDDC = 3.3V
VDDC = 2.7V
VDDI = 5V
VDDI = 3.3V
VDDI = 2.7V
4
5
6
175
350
500
1000
750
1500
Transition Detector
Timeout, DIV = 1
VDDI = 5V
VDDI = 3.3V
VDDI = 2.7V
20
40
55
110
100
200
Output Clock Rise Time
Output Clock Fall Time
Output Clock Skew
CLK1 to CLK2
Note 2
-250
0
Max.
270
220
180
8
10
12
750
2000
3000
80
210
400
1.5
1.5
250
Units
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
Note 1. Frequencies less than the minimum may cause a timeout which will not guarantee glitch-free switching unless the clock
is actually stopped.
Note 2: Assumes identically loaded outputs with identical rise times, measured at VDD/2.
Note 3: Output duty cycle is set by duty cycle of input clock at VDDC/2.
IDT™ / ICS™ GLITCH-FREE CLOCK MULITPLEXER
7
ICS580-01 REV K 092509
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