8701CYILF 查看數據表（PDF） - Integrated Device Technology
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8701CYILF Datasheet PDF : 14 Pages
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ICS8701I
LOW SKEW, ÷1, ÷2
CLOCK GENERATOR
TABLE 5B. AC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum
fMAX
Input Frequency
250
tpLH
Propagation Delay,
Low-to-High; NOTE 1
0MHz ≤ f ≤ 200MHz
2.4
3.7
tpHL
Propagation Delay,
High-to-Low; NOTE 1
0MHz ≤ f ≤ 200MHz
2.4
3.7
tsk(b)
tsk(o)
tsk(w)
tsk(pp)
tR
tF
tPW
Bank Skew; NOTE 2, 7
Output Skew; NOTE 3, 7
Multiple Frequency Skew;
NOTE 4, 7
Part to Part Skew;
NOTE 5, 7
Output Rise Time; NOTE 6
Output Fall Time; NOTE 6
Output Pulse Width
Measured on rising edge
at VDDO/2
Measured on rising edge
at V /2
DDO
Measured on rising edge
at VDDO/2
Measured on rising edge
at V /2
DDO
30% to 70%
30% to 70%
0MHz ≤ f ≤ 200MHz
f = 200MHz
225
250
300
650
200
200
tCYCLE/2 - 0.6
1.9
tCYCLE/2
2.5
900
900
tCYCLE/2 + 0.6
3.1
tEN
Output Enable Time;
NOTE 6
f = 10MHz
6
tDIS
Output Disable Time;
NOTE 6
f = 10MHz
6
All parameters measured at 200MHz unless noted otherwise.
NOTE 1: Measured from the VDD input crossing point to the output at VDDO/2.
NOTE 2: Defined as skew within a bank of outputs at the same supply voltages and with equal load conditions.
NOTE 3: Defined as skew between outputs at the same supply voltages and with equal load conditions.
NOTE 4 Defined as skew across banks of outputs operating at different frequency with the same supply voltages
and equal load conditions.
NOTE 5: Defined as skew between outputs on different devices operating at the same supply voltages and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2.
NOTE 6: These parameters are guaranteed by characterization. Not tested in production.
NOTE 7: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ns
ns
ps
ps
ps
ps
ps
ps
ns
ns
ns
ns
8701CYI
www.idt.com
7
REV. C JULY 27, 2010
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