ICS8701CYIT 查看數據表（PDF） - Integrated Circuit Systems

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ICS8701CYIT

LOW SKEW, ÷1, ÷2 CLOCK GENERATOR

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS8701I

LOW SKEW ¸1, ¸2

CLOCK GENERATOR

TABLE 5B. AC CHARACTERISTICS, VDDI=3.3V±5%, VDDO=2.5V±5%, TA=-40°C TO 85°C

Symbol Parameter

Test Conditions

Minimum Typical Maximum

fMAX Maximum Input Frequency

250

tpLH

Propagation Delay,

Low-to-High

0MHZ £ f £ 200MHz

2.4

3.7

tpHL

Propagation Delay,

High-to-Low

0MHZ £ f £ 200MHz

2.4

3.7

tsk(b) Bank Skew; NOTE 2

Measured on rising edge at VDDO/2

225

tsk(o) Output Skew; NOTE 3

Measured on rising edge at VDDO/2

250

tsk(w)

Multiple Frequency Skew;

NOTE 4

Measured on rising edge at VDDO/2

300

tsk(pp) Part to Part Skew; NOTE 5 Measured on rising edge at VDDO/2

650

tR

Output Rise Time; NOTE 6

30% to 70%

200

900

tF

Output Fall Time; NOTE 6

30% to 70%

200

900

tPW

Output Pulse Width

0MHZ £ f £ 200MHz

tCYCLE/2

- 0.6

tCYCLE/2

tCYCLE/2

+ 0.6

f = 200MHz

1.9

2.5

3.1

tEN

Output Enable Time;

NOTE 6

f = 10MHz

6

tDIS

Output Disable Time;

NOTE 6

f = 10MHz

6

W NOTE 1: All parameters measured at 200MHz unless noted otherwise. All outputs terminated with 50 to VDDO/2.

NOTE 2: Defined as skew within a bank of outputs at the same supply voltages and with equal load conditions.

NOTE 3: Defined as skew across banks of outputs at the same supply voltages and with equal load conditions.

NOTE 4: Defined as skew across banks of outputs operating at different frequency with the same supply voltages

and equal load conditions.

NOTE 5: Defined as the skew at different outputs on different devices operating at the same supply voltages and

with equal load conditions.

NOTE 6: These parameters are guaranteed by characterization. Not tested in production.

Units

MHz

ns

ns

ps

ps

ps

ps

ps

ps

ns

ns

ns

ns

8701I

www.icst.com/products/hiperclocks.html

7

REV. A MARCH 16, 2001

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