AD7273/AD7274
PRELIMINARY TECHNICAL DATA
Preliminary Technical Data
OUTLINE DIMENSIONS
Dimensions shown in millimiters
8-Lead Thin Small Outline Transistor Package [TSOT]
(UJ- 8)
2 .90 BSC
1 .6 0 BSC
87
12
65
34
2 .8 0 BSC
PIN 1
0 .9 0
0 .8 7
0 .8 4
1 .9 5
BSC
0 .6 5 BSC
0 .1 0 MAX
0.38
0.22
1 .00 MAX 0 .2 0
0 .0 8
8°
SEATING
4°
PLANE
0°
0 .5 5
0 .4 5
0 .3 5
COMPLIANT TO JEDEC STANDARDS MO-193BA
8-Lead Mini Small Outline Package [MSOP]
(RM - 8)
3.0 0
BSC
8
3 .0 0
BSC
1
5
4 .9 0
BSC
4
PIN 1
0 .6 5 BSC
0 .1 5
0 .0 0
1 .1 0 MAX
0 .3 8
0 .2 2
0 .23
0 .08
8°
0°
COPLANARITY
0 .1 0
SEATING
PLANE
0.80
0.60
0.40
COMPLIANT TO JEDEC STANDARDS MO-187AA
–20–
REV. PrE