Connection Diagram
Logic Symbols
Pin Descriptions
Pin Names
D0–D7
CE
Q0–Q7
CP
Description
Data Inputs
Clock Enable (Active LOW)
Data Outputs
Clock Pulse Input
IEEE/IEC
Mode Select-Function Table
Operating Mode
Load ‘1'
Load ‘0'
Hold (Do Nothing)
Inputs
CP CE Dn
L
H
L
L
H
X
X
H
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock Transition
Outputs
Qn
H
L
No Change
No Change
©1988 Fairchild Semiconductor Corporation
74AC377, 74ACT377 Rev. 1.6.1
2
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