S25FL128S, S25FL256S
2.16 Block Diagrams
Figure 2.2 Bus Master and Memory Devices on the SPI Bus - Single Bit Data Path
HOLD#
WP#
SI
SO
SCK
HOLD#
WP#
SO
SI
SCK
CS2#
CS1#
CS1#
CS2#
SPI
Bus Master
FL-S
Flash
FL-S
Flash
Figure 2.3 Bus Master and Memory Devices on the SPI Bus - Dual Bit Data Path
HOLD#
WP#
IO1
IO0
SCK
HOLD#
WP#
IO1
IO0
SCK
CS2#
CS1#
CS1#
CS2#
SPI
Bus Master
FL-S
Flash
FL-S
Flash
Figure 2.4 Bus Master and Memory Devices on the SPI Bus - Quad Bit Data Path
IO3
IO2
IO1
IO0
SCK
IO3
IO2
IO1
IO0
SCK
CS2#
CS1#
CS1#
CS2#
SPI
Bus Master
FL-S
Flash
FL-S
Flash
Document Number: 001-98283 Rev. *I
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