74LCX32646 查看數據表（PDF） - Fairchild Semiconductor
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产品描述 (功能)
生产厂家
74LCX32646
Fairchild Semiconductor
74LCX32646 Datasheet PDF : 11 Pages
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Preliminary
Truth Table
(Note 3)
OE1 DIR1
Inputs
CPAB1 CPBA1 SAB1
Data I/O (Note 4)
SBA1 1A0–7 1B0–7
Output Operation Mode
H
H
H
X
X
X
H or L
X
H or L
X
X
X
X
X
Isolation
X
Input Input Clock An Data into A Register
X
Clock Bn Data Into B Register
L
L
H
H
X
X
X
L
L
X
An to Bn — Real Time (Transparent Mode)
X
Input Output Clock An Data to A Register
L
L
H
H
H or L
X
X
H
H
L
L
L
L
X
X
X
X
X
L
L
L
L
X
X
H or L
X
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
X
A Register to Bn (Stored Mode)
X
Clock An Data into A Register and Output to Bn
L
Bn to An — Real Time (Transparent Mode)
L
Output Input Clock Bn Data into B Register
H
B Register to An (Stored Mode)
H
Clock Bn into B Register and Output to An
Note 3: Data I/O paths (1A and 1B: 0 - 7) is shown. This also applies to data I/O (1A and 1B: 8 - 15) and #2 control pins, to data (2A and 2B: 0 - 7) and #3
control pins, to data (2A and 2B: 8 - 15) and #4 control pins.
Note 4: The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
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