74HC166PW 查看數據表（PDF） - Philips Electronics

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74HC166PW

8-bit parallel-in/serial-out shift register

Philips Electronics 

Philips Semiconductors

8-bit parallel-in/serial-out shift register

AC WAVEFORMS

Product specification

74HC/HCT166

The changing to output assumes internal Q6 opposite state from Q7.

The number of clock pulses required between the tPLH and tPHL

measurements can be determined from the function table.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3V; VI = GND to 3V.

Fig.7 Waveforms showing the clock (CP) to output (Q7) propagation delays, the clock pulse width, the output

transition times and the maximum clock frequency.

The number of clock pulses required between the tPLH and tPHL

measurements can be determined from the function table.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3V; VI = GND to 3V.

Fig.8 Waveforms showing the master reset (MR) pulse width, the master reset to output (Q7) propagation delay

and the master reset to clock (CP) removal time.

December 1990

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