NXP Semiconductors
4. Functional diagram
74HC107-Q100; 74HCT107-Q100
Dual JK flip-flop with reset; negative-edge trigger
- -
-
4 4
4
&3
))
&3
&3
.
.
.
4 4
4
5
5 5
DDD
Fig 1. Logic symbol
-
&
.
5
-
&
.
5
Fig 2. IEC logic symbol
DDD
C
C
C
C
K
Q
J
C
C
C
C
R
Q
CP
C
C
Fig 3. Logic diagram (one flip-flop)
001aab982
74HC_HCT107_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 November 2013
© NXP B.V. 2013. All rights reserved.
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