AT45DB641E 查看數據表（PDF） - Unspecified
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AT45DB641E Datasheet PDF : 71 Pages
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AT45DB641E
AT45DB641E
64-Mbit DataFlash (with Extra 2-Mbits), 1.7V Minimum
SPI Serial Flash Memory
Features
Single 1.7V - 3.6V supply
Serial Peripheral Interface (SPI) compatible
Supports SPI modes 0 and 3
Supports RapidS™ operation
Continuous read capability through entire array
Up to 85MHz
Low-power read option up to 15MHz
Clock-to-output time (tV) of 8ns maximum
User configurable page size
256 bytes per page
264 bytes per page (default)
Page size can be factory pre-configured for 256 bytes
Two fully independent SRAM data buffers (256/264 bytes)
Allows receiving data while reprogramming the main memory array
Flexible programming options
Byte/Page Program (1 to 256/264 bytes) directly into main memory
Buffer Write | Buffer to Main Memory Page Program
Flexible erase options
Page Erase (256/264 bytes)
Block Erase (2KB)
Sector Erase (256KB)
Chip Erase (64-Mbits)
Program and Erase Suspend/Resume
Advanced hardware and software data protection features
Individual sector protection
Individual sector lockdown to make any sector permanently read-only
128-byte, One-Time Programmable (OTP) Security Register
64 bytes factory programmed with a unique identifier
64 bytes user programmable
Hardware and software controlled reset options
JEDEC Standard Manufacturer and Device ID Read
Low-power dissipation
400nA Ultra-Deep Power-Down current (typical)
5µA Deep Power-Down current (typical)
25µA Standby current (typical)
11mA Active Read current (typical at 20MHz)
Endurance: 100,000 program/erase cycles per page minimum
Data retention: 20 years
Complies with full industrial temperature range
Green (Pb/Halide-free/RoHS compliant) packaging options
8-lead SOIC (0.208" wide)
8-pad Ultra-thin DFN (5 x 6 x 0.6mm)
8-pad Very-thin DFN (6 x 8 x 1.0mm)
9-ball BGA (6mm x 6mm package 3 x 3 ball array)
DS-45DB641E-027E–DFLASH–1/2014
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