MCP6401 查看數據表（PDF） - Microchip Technology
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MCP6401 Datasheet PDF : 44 Pages
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MCP6401/1R/1U/2/4/6/7/9
4.0 APPLICATION INFORMATION
The MCP6401/1R/1U/2/4/6/7/9 family of op amps is
manufactured using Microchip’s state-of-the-art CMOS
process and is specifically designed for low-power,
high-precision applications.
4.1 Rail-to-Rail Input
4.1.1 PHASE REVERSAL
The MCP6401/1R/1U/2/4/6/7/9 op amps are designed
to prevent phase reversal when the input pins exceed
the supply voltages. Figure 2-33 shows the input
voltage exceeding the supply voltage with no phase
reversal.
4.1.2 INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see Section 1.1 “Absolute Maximum
Ratings †”).
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors against many (but not all)
over-voltage conditions, and to minimize the input bias
current (IB).
VDD
Bond
Pad
VIN+
Bond
Pad
Input
Stage
Bond
Pad
VIN–
VSS
Bond
Pad
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
over-voltage (beyond VDD) events. Very fast ESD
events (that meet the spec) are limited so that damage
does not occur.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
VDD
D1 D2
U1
V1
VOUT
MCP640x
V2
FIGURE 4-2:
Inputs.
Protecting the Analog
A significant amount of current can flow out of the
inputs when the Common Mode voltage (VCM) is below
ground (VSS); See Figure 2-35.
4.1.3 INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
into the input pins (see Section 1.1 “Absolute
Maximum Ratings †”).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
currents in or out of the input pins (and the ESD diodes,
D1 and D2). The diode currents will go through either
VDD or VSS.
VDD
D1 D2
U1
V1
R1
MCP640x
VOUT
V2
R2
min(R1,R2) >
VSS – min(V1, V2)
2 mA
min(R1,R2) >
max(V1,V2) – VDD
2 mA
FIGURE 4-3:
Inputs.
Protecting the Analog
4.1.4 NORMAL OPERATION
The input stage of the MCP6401/1R/1U/2/4/6/7/9 op
amps use two differential input stages in parallel. One
operates at a low Common Mode input voltage (VCM),
while the other operates at a high VCM. With this
topology, the device operates with a VCM up to 300 mV
above VDD and 300 mV below VSS (see Figure 2-14).
The input offset voltage is measured at VCM = VSS –
0.3V and VDD + 0.3V to ensure proper operation.
The transition between the input stages occurs when
VCM is near VDD – 1.1V (see Figures 2-6 and 2-7). For
the best distortion performance and gain linearity, with
non-inverting gains, avoid this region of operation.
© 2009-2011 Microchip Technology Inc.
DS22229D-page 17
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