AD5737 查看數據表（PDF） - Analog Devices

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AD5737

Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output DAC with Dynamic Power Control and HART Connectivity

Analog Devices 

Data Sheet

Timing Diagrams

SCLK

SYNC

SDIN

LDAC

IOUT_x

LDAC = 0

IOUT_x

CLEAR

IOUT_x

1

2

t6

t4

t7

MSB

t1

24

t3

t2

t5

t8

LSB

t10

t19

t9

t10

t17

t12

t11

t13

t14

t12

t16

RESET

t18

Figure 3. Serial Interface Timing Diagram

SCLK

SYNC

SDIN

SDO

1

24

1

24

t6

MSB

LSB

MSB

LSB

INPUT WORD SPECIFIES

REGISTER TO BE READ

MSB

NOP CONDITION

LSB

UNDEFINED

t15

Figure 4. Readback Timing Diagram

SELECTED REGISTER DATA

CLOCKED OUT

AD5737

Rev. B | Page 7 of 44

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