74HC30PW-Q100 查看數據表（PDF） - NXP Semiconductors.
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74HC30PW-Q100 Datasheet PDF : 14 Pages
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Nexperia
74HC30-Q100; 74HCT30-Q100
8-input NAND gate
5. Pinning information
5.1 Pinning
$
%
&
'
(
)
*1'
Fig 4. Pin configuration SO14 and TSSOP14
+&4
+&74
9&&
QF
+
*
QF
QF
<
DDD
5.2 Pin description
Table 2.
Symbol
A
B
C
D
E
F
GND
Y
n.c.
n.c.
G
H
n.c.
VCC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data input
data input
data input
data input
data input
data input
ground (0 V)
data output
not connected
not connected
data input
data input
not connected
supply voltage
74HC_HCT30_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 30 January 2013
© Nexperia B.V. 2017. All rights reserved
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