74LV374D,118 查看數據表（PDF） - NXP Semiconductors.
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74LV374D,118 Datasheet PDF : 17 Pages
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NXP Semiconductors
74LV374
Octal D-type flip-flop; positive edge-trigger; 3-state
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.
Symbol Parameter
Conditions
−40 °C to +85 °C
Min Typ[1] Max
tdis
disable time
OE to Qn; Figure 8
[5]
VCC = 1.2 V
-
80
-
VCC = 2.0 V
-
29
39
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
-
[3]
-
[3]
-
22
29
17
24
-
20
tW
pulse width
CP, HIGH or LOW; see Figure 7
VCC = 2.0 V
34
12
-
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
25
9
-
[3] 20
7
-
tsu
set-up time
Dn to CP; see Figure 9
VCC = 1.2 V
-
25
-
VCC = 2.0 V
22
9
-
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
16
6
-
[3] 13
5
-
th
hold time
Dn to CP; see Figure 9
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
-
−10
-
5
−3
-
5
−2
-
[3]
5
−2
-
fmax
maximum
frequency
see Figure 7
VCC = 2.0 V
15
40
-
VCC = 2.7 V
19
58
-
VCC = 3.3 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
CPD
power dissipation CL = 50 pF; fi = 1 MHz;
capacitance
VI = GND to VCC
-
77
-
[3] 24
70
-
[6]
25
[1] Typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical value measured at VCC = 3.3 V.
[4] ten is the same as tPZH and tPZL.
[5] tdis is the same as tPHZ and tPLZ.
[6] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
−40 °C to +125 °C Unit
Min
Max
-
-
ns
-
48 ns
-
36 ns
-
29 ns
-
24 ns
41
-
ns
30
-
ns
24
-
ns
-
-
ns
26
-
ns
19
-
ns
15
-
ns
-
-
ns
5
-
ns
5
-
ns
5
-
ns
12
-
MHz
16
-
MHz
-
-
MHz
20
-
MHz
pF
74LV374_2
Product data sheet
Rev. 02 — 14 May 2009
© NXP B.V. 2009. All rights reserved.
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