HEF4046B(2016) 查看數據表（PDF） - NXP Semiconductors.
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HEF4046B Datasheet PDF : 19 Pages
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Nexperia
4. Functional diagram
HEF4046B
Phase-locked loop
6,*B,1
&20 3B,1
·1
9&2B287
&$
&
&%
5 5
966
5 5
9&2
3+$6(
&203$5$725
3+$6(
&203$5$725
6285&(
)2//2:(5
,1+
966
SLQ
Fig 1. Functional diagram
5. Pinning information
5.1 Pinning
3&B287
3&B287
3&3
9&2B,1
6)B287
5
/2:3$66
),/7(5
&
966
56)
966
=(1(5
DDH
Fig 2. Pin configuration
+()%
3&3B287
3&B287
&203B,1
9&2B287
,1+
&$
&%
966
9''
=(1(5
6,*B,1
3&B287
5
5
6)B287
9&2B,1
DDH
HEF4046B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 24 March 2016
© Nexperia B.V. 2017. All rights reserved
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