ADG5412BRUZ 查看數據表（PDF） - Analog Devices
零件编号
产品描述 (功能)
生产厂家
ADG5412BRUZ Datasheet PDF : 19 Pages
| |||
Data Sheet
ADG5412/ADG5413
OUTLINE DIMENSIONS
5.10
5.00
4.90
16
9
4.50
4.40
4.30
1
6.40
BSC
8
PIN 1
1.20
0.15
MAX
0.20
0.05
0.09
0.75
0.30
8°
0.60
0.65
BSC
0.19
COPLANARITY
SEATING
PLANE
0°
0.45
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 34. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
PIN 1
INDICATOR
0.80
0.75
0.70
SEATING
PLANE
4.10
4.00 SQ
3.90
TOP VIEW
0.65
BSC
0.45
0.40
0.35
0.35
0.30
0.25
13
16
12
1
EXPOSED
PAD
4
9
8
5
BOTTOM VIEW
PIN 1
INDICATOR
2.70
2.60 SQ
2.50
0.20 MIN
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
ORDERING GUIDE
Model1,2
ADG5412BRUZ
ADG5412BRUZ-REEL7
ADG5412BCPZ-REEL7
ADG5413BRUZ
ADG5413BRUZ-REEL7
ADG5413BCPZ-REEL7
EVAL-16TSSOPEBZ
COMPLIANT TO JEDEC STANDARDS MO-220-WGGC.
Figure 35. 16-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body and 0.75 mm Package Height
(CP-16-17)
Dimensions shown in millimeters
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Lead Frame Chip Scale Package [LFCSP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Lead Frame Chip Scale Package [LFCSP]
Evaluation Board
1 Z = RoHS Compliant Part.
2 The EVAL-16TSSOPEBZ can be used to test the ADG5412 and the ADG5413.
Package Option
RU-16
RU-16
CP-16-17
RU-16
RU-16
CP-16-17
©2010–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09202-0-11/17(D)
Rev. D | Page 19 of 19
Share Link: 