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L6472PD 查看數據表(PDF) - STMicroelectronics

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L6472PD Datasheet PDF : 70 Pages
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L6472
Pin connection
Pin list
Table 6. Pin description
Number
POWERSO HTSSOP
Name
Type
Function
24
17
VDD
Power
Logic output supply voltage (pull-up reference)
9
6
VREG
Power
Internal 3 V voltage regulator output and 3.3 V
external logic supply
Oscillator pin 1. To connect an external oscillator or
10
7
OSCIN
Analog input clock source. If this pin is unused, it should be left
floating.
Oscillator pin 2. To connect an external oscillator.
11
8
OSCOUT
Analog output
When the internal oscillator is used this pin can
supply 2/4/8/16 MHz. If this pin is unused, it should
be left floating.
13
10
CP
Output
Charge pump oscillator output
14
11
Vboot
Supply voltage
Bootstrap voltage needed for driving the high-side
power DMOS of both bridges (A and B).
8
5
ADCIN
Analog input Internal analog-to-digital converter input
4, 5
2
33, 34
26
VSA
Power supply
Full bridge A power supply pin. It must be connected
to VSB.
15, 16
12
22, 23
16
VSB
Power supply
Full bridge B power supply pin. It must be connected
to VSA.
1
27
PGND
19
13
Ground
Power ground pin
2, 3
1
OUT1A
Power output Full bridge A output 1
35, 36
28
OUT2A
Power output Full bridge A output 2
17, 18
14
OUT1B
Power output Full bridge B output 1
20, 21
15
OUT2B
Power output Full bridge B output 2
12
9
AGND
Ground
Analog ground.
7
4
SW
Logical input
External switch input pin. If not used the pin should
be connected to VDD.
28
21
DGND
Ground
Digital ground
By default, this BUSY pin is forced low when the
29
22
BUSY\SYNC
Open drain output
device is performing a command. Otherwise the pin
can be configured to generate a synchronization
signal.
25
18
SDO
Logic output Data output pin for serial interface
27
20
SDI
Logic input
Data input pin for serial interface
26
19
CK
Logic input Serial interface clock
30
23
CS
Logic input Chip select input pin for serial interface
DocID022729 Rev 5
17/70
70

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