
Main digital blocks
Figure 10. FIFO access sequence in asynchronous mode
A3G4250D
No
WTM = ‘1’
Yes
Read FIFO SRC (2Fh)
n = FSS<4-0>
Dummy Read from ‘28h’
(increment bit =‘0’)
n--
Burst Read from ‘2Ah’ of
6 registers (Y, Z, X)
No
Yes
n=0
Example:
FSS = 1 read twice
FSS = 2 read 3 times
AM10248V1
If the above sequence is not followed, the acquisition from FIFO may lead to corrupted data.
20/44
Doc 022768 Rev 3