BM29F400B 查看數據表（PDF） - Unspecified
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BM29F400B Datasheet PDF : 38 Pages
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BRIGHT
Microelectronics
Inc.
Preliminary BM29F400T/BM29F400B
Erase and Programming Performance
PARAMETER
Sector Erase Time
Chip Erase Time
Byte Programming Time
Chip Programming Time
Erase/Program Cycles
MIN.
10,000
LIMITS
TYP.
0.33
2.4
16
8
100,000
MAX.
15
120
400
200
UNIT
sec
sec
us
sec
cycles
Latch Up Characteristics
PARAMETER
Input Voltage with respect to Vss on all I/O
pins
Vcc Current
MIN.
-1.0V
-100 mA
Note: Includes all pins except Vcc. Test conditions: Vcc = 5.0V, one pin at a time.
CAPACITANCE
TSOP Pin
PARAMETER
Input Capacitance
Output Capacitance
Control Pin Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions TA = 25°, f = 1.0 MHz.
SOP Pin
SYMBOL
CIN
COUT
CIN2
TEST SETUP
VIN = 0
VOUT = 0
VIN = 0
TYP.
6
8.5
8
PARAMETER
Input Capacitance
Output Capacitance
Control Pin Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions TA = 25°, f = 1.0 MHz.
Data Retention
SYMBOL
CIN
COUT
CIN2
TEST SETUP
VIN = 0
VOUT = 0
VIN = 0
TYP.
6
8.5
8
MAX.
Vcc + 1.0V
+ 100 mA
MAX.
7.5
12
10
UNIT
pF
pF
pF
MAX.
7.5
12
10
UNIT
pF
pF
pF
PARAMETER
Minimum Pattern Data Retention Time
Minimum Pattern Data Retention Time
TEST CONDITIONS
150°
125°
MIN.
10
20
UNIT
Years
Years
- 34 -
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