Function Table
Inputs
Clear
Clock
D
L
X
X
H
↑
H
H
↑
L
H
L
X
H = HIGH Level (steady state)
L = LOW Level (steady state)
X = Don’t Care
↑ = Transition from LOW-to-HIGH Level
Q0 = the level of Q before the indicated steady-state input conditions were established
Note 1: applies to DM74ALS175 only
Logic Diagrams
DM74ALS174
Outputs
Q
Q (Note 1)
L
H
H
L
L
H
Q0
Q0
DM74ALS175
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