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ZN428E8 查看數據表(PDF) - Unspecified

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ZN428E8 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Up to five ZN428s may be driven from one internal
reference (there is no need to reduce RREF). This useful
feature saves power and gives excellent gain tracking
between the converters.
(b) External Reference
If required an external reference voltage may be connected
to VREF IN. The slope resistance of such a reference should be
less than 2.5 , where n is the number of converters supplied.
n
VREF IN can be varied from 0 to +3V for ratiometric
operation. The ZN428 is guaranteed monotonic for VREF IN
above 2V.
ZN428
LOGIC
Input coding is binary for unipolar operation and offset
binary for bipolar operation. When the ENABLE input is low
the data inputs drive the D to A directly. When ENABLE goes
high the input data word is held in the data latch.
The equivalent circuit for the data and clock inputs is
shown in Fig.6.
The ZN428 is provided with separate analog and digital
ground connections. The circuit will operate correctly with as
much as ±200mV between the two grounds.
Fig.6 Equivalent circuit of all inputs
OPERATING NOTES
(1) Unipolar D-A Converter
The nominal output range of the ZN428 is 0 to VREF IN
through a 4resistance. Other output ranges can readily be
obtained by using an external amplifier.
The general scheme (Fig.7) is suitable for amplifiers
with input bias currents less than 1.5µA.
The resulting full-scale range is given by:
Using these relationships a table of nominal resistance
values for R1 and R2 can be constructed for VREF IN = 2.5V.
Output Range
G
+5V
2
+10V
4
R1
8k
16k
R2
8k
5.33k
VOUT
FS
=(
1
+
R1
R2
)
VREF
IN
=
G.VREF
IN
The impedance at the inverting input is R1//R2 and for
low drift with temperature this parallel combination should be
equal to the ladder resistance (4k). The required nominal
values of R1 and R2 are given by R1 = 4Gkand R2 =
4G/(G-1)k.
For gain setting R1 is adjusted about its nominal value.
Practical circuit realisations (including amplifier stabilising
components) for +5 and +10V output ranges are given in
Fig.8. Settling time for a major transition is 1.5µs typical.

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