IN74HC161AD 查看數據表（PDF） - IK Semicon Co., Ltd
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IN74HC161AD Datasheet PDF : 10 Pages
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IN74HC161A
TIMING REQUIREMENTS (CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V 25 °C ≤85°C ≤125°C Unit
to
-55°C
tSU Minimum Setup Time, Preset Data Inputs to
Clock (Figure 4)
2.0 40
60
80
ns
4.5 15
20
30
6.0 12
18
20
tSU Minimum Setup Time, Load to Clock
(Figure 4)
2.0 60
75
90
ns
4.5 15
20
30
6.0 12
18
20
tSU Minimum Setup Time, Enable T or Enable P to 2.0 80
Clock (Figure 5)
4.5 20
6.0 17
95
110
ns
25
35
23
25
th
Minimum Hold Time, Clock to Load or Preset
2.0
3
3
3
ns
Data Inputs (Figure 4)
4.5
3
3
3
6.0
3
3
3
th
Minimum Hold Time, Clock to Enable T or
Enable P (Figure 5)
2.0
3
3
3
ns
4.5
3
3
3
6.0
3
3
3
trec Minimum Recovery Time, Reset Inactive to
Clock (Figure 2)
2.0 80
4.5 15
6.0 12
95
110
ns
20
26
17
23
trec Minimum Recovery Time, Load Inactive to Clock 2.0 80
(Figure 4)
4.5 15
6.0 12
95
110
ns
20
26
17
23
tw
Minimum Pulse Width, Clock (Figure 1)
2.0 60
75
90
ns
4.5 12
15
18
6.0 10
13
15
tw
Minimum Pulse Width, Reset (Figure 2)
2.0 60
75
90
ns
4.5 12
15
18
6.0 10
13
15
tr, tf Maximum Input Rise and Fall Times
(Figure 1)
2.0 1000 1000 1000 ns
4.5 500
500
500
6.0 400
400
400
Rev. 00
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