HYB5117800BSJ-50- 查看數據表（PDF） - Siemens AG

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HYB5117800BSJ-50-

2M × 8 - Bit Dynamic RAM 2k Refresh (Fast Page Mode)

Siemens AG 

HYB 5(3)117800/BSJ-50/-60

2M × 8 DRAM

AC Characteristics (cont’d) 5, 6

TA = 0 to 70 °C, VCC = 5 V ± 10 % / VCC = 3.3 V ± 0.3 V, tT = 5 ns

Parameter

Symbol

Limit Values

Unit Note

-50

-60

min. max. min. max.

Data to OE low delay

CAS high to data delay

OE high to data delay

tDZO

tCDD

tODD

0

–

13 –

13 –

0

–

15 –

15 –

ns 13

ns 14

ns 14

Write Cycle

Write command hold time

Write command pulse width

Write command setup time

Write command to RAS lead time

Write command to CAS lead time

Data setup time

Data hold time

Data to CAS low delay

tWCH

tWP

tWCS

tRWL

tCWL

tDS

tDH

tDZC

8

–

8

–

0

–

13 –

13 –

0

–

10 –

0

–

10 –

10 –

0

–

15 –

15 –

0

–

10 –

0

–

ns

ns

ns 15

ns

ns

ns 16

ns 16

ns 13

Read-Modify-Write Cycle

Read-write cycle time

RAS to WE delay time

CAS to WE delay time

Column address to WE delay time

OE command hold time

tRWC

tRWD

tCWD

tAWD

tOEH

126 –

68 –

31 –

43 –

13 –

150 –

80 –

35 –

50 –

15 –

ns

ns 15

ns 15

ns 15

ns

Fast Page Mode Cycle

Fast page mode cycle time

CAS precharge time

Access time from CAS precharge

RAS pulse width

CAS precharge to RAS Delay

tPC

tCP

tCPA

tRAS

tRHPC

35 –

40 –

ns

10 –

10 –

ns

–

30 –

35 ns 7

50 200k 60 200k ns

30 –

35 –

ns

Semiconductor Group

7

1998-10-01

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