HY27UF084G2M-T 查看數據表（PDF） - Hynix Semiconductor

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HY27UF084G2M-T

4Gbit (512Mx8bit) NAND Flash

Hynix Semiconductor 

Revision History

HY27UF084G2M Series

4Gbit (512Mx8bit) NAND Flash

-Continued-

Revision

No.

History

1) Change AC Characteristics

tR

Before 20

After 25

tAR tREA tRHZ

10

18

30

15

20

50

tCHZ

30

50

tCEA

25

35

tCLS tWP tDS tWC tADL tRP tRC

Before 12

12

12

25

70

12

25

0.2

After 15

15

15

30 100 15

30

2) Add tCRRH (100ns, Min)

- tCRRH : Cache Read RE High

3) Change 3rd Read ID

- 3rd Read ID is changed to 80h

- 3rd Byte of Device Identifier Table is added.

4) Change NOP

- Number of partial Program Cycle in the same page is changed to 4.

1) Change AC Characteristics

tREA tCEA tCS

0.3

Before 20

35

20

After 25

30

25

Draft Date Remark

Oct. 08. 2005 Preliminary

Nov. 16. 2005 Preliminary

1) Add ECC algorithm. (1bit/512bytes)

0.4

2) Change NOP

3) Correct Read ID naming

0.5

1) Delet Preliminary.

0.6

1) Correct copy back function.

1) Delete PRE function.

0.7

2) Delete Lock & Unlock function.

3) Delete Auto Read function.

Jun. 20. 2006 Preliminary

Jul. 10. 2006

Oct. 02. 2006

Dec. 26. 2006

Rev. 0.7 / Dec. 2006

3

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