EMC3DXV5T5G(2010) 查看數據表（PDF） - ON Semiconductor
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EMC3DXV5T5G Datasheet PDF : 11 Pages
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EMC2DXV5T1G,
EMC3DXV5T1G,
EMC4DXV5T1G,
EMC5DXV5T1G
Dual Common
Base-Collector Bias
Resistor Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the EMC2DXV5T1 series,
two complementary BRT devices are housed in the SOT−553 package
which is ideal for low power surface mount applications where board
space is at a premium.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• These are Pb−Free Devices
MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1
and Q2, − minus sign for Q1 (PNP) omitted)
Rating
Symbol Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current
IC
100
mAdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
3
2
1
R1
R2
Q2
R2
Q1
R1
4
5
5
1
SOT−553
CASE 463B
MARKING DIAGRAM
Ux M G
G
Ux = Specific Device Code
x = C, 3, E, or 5
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
1
October, 2010 − Rev. 6
Publication Order Number:
EMC2DXV5T1/D
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