74LVCH322245AEC 查看數據表（PDF） - NXP Semiconductors.

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74LVCH322245AEC

32-bit bus transceiver with direction pin; 30 Ω series termination resistors; 5 V tolerant; 3-state

NXP Semiconductors. 

NXP Semiconductors

74LVCH322245A

32-bit bus transceiver with direction pin; 30  resistors; tolerance;

3-state

Table 7. Dynamic characteristics …continued

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.

Symbol Parameter Conditions

Tamb = 40 C to +85 C 40 C to +125 C Unit

Min Typ[1] Max

Min

Max

tsk(o)

output skew VCC = 3.0 V to 3.6 V

time

[3]

-

-

1.0

-

1.5

ns

CPD

power

per buffer; VI = GND to VCC

dissipation

capacitance

VCC = 1.65 V to 1.95 V

VCC = 2.3 V to 2.7 V

[4]

-

10.4

-

-

-

14.0

-

-

-

pF

-

pF

VCC = 3.0 V to 3.6 V

-

17.2

-

-

-

pF

[1] Typical values are measured at Tamb = 25 C and VCC = 2.5 V, 2.7 V, and 3.3 V respectively.

[2] tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.

tdis is the same as tPLZ and tPHZ.

[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

[4] CPD is used to determine the dynamic power dissipation (PD in W).

PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

(CL  VCC2  fo) = sum of the outputs.

11. Waveforms

VI

nAn, nBn

input

GND

VOH

nBn, nAn

output

VOL

t PHL

VM

VM

t PLH

mna477

Fig 4.

VM = 1.5 V at VCC  2.7 V.

VM = 0.5  VCC at VCC < 2.7 V.

VOL and VOH are typical output voltage levels that occur with the output load.

The input (nAn, nBn) to output (nBn, nAn) propagation delays

74LVCH322245A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 20 December 2011

© NXP B.V. 2011. All rights reserved.

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