NXP Semiconductors
74HC541-Q100; 74HCT541-Q100
Octal buffer/line driver; 3-state
5. Pinning information
5.1 Pinning
+&4
+&74
2(
$
$
$
$
$
$
$
$
*1'
Fig 5. Pin configuration SO20 and TSSOP20
9&&
2(
<
<
<
<
<
<
<
<
DDD
5.2 Pin description
Table 2.
Symbol
OE1
A0 to A7
GND
Y0 to Y7
OE2
VCC
Pin description
Pin
Description
1
output-enable input (active LOW)
2, 3, 4, 5, 6, 7, 8, 9
data input
10
ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11 data output
19
output-enable input (active LOW)
20
supply voltage
6. Functional description
Table 3.
Control
OE1
L
L
X
H
Functional table[1]
OE2
L
L
H
X
Input
An
L
H
X
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Output
Yn
L
H
Z
Z
74HC_HCT541_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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