74HC161(2017) 查看數據表（PDF） - NXP Semiconductors.
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74HC161
(Rev.:2017)
(Rev.:2017)
NXP Semiconductors.
74HC161 Datasheet PDF : 21 Pages
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NXP Semiconductors
74HC161
Presettable synchronous 4-bit binary counter; asynchronous reset
05
3(
'
'
'
'
&3
&(3
&(7
4
4
4
4
7&
UHVHW
SUHVHW
FRXQW
LQKLELW
PQD
Fig 8.
Typical timing sequence: reset outputs to zero; preset to binary twelve; count to thirteen, fourteen, fifteen, zero, one and two;
inhibit.
Typical timing sequence
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max Unit
VCC
supply voltage
IIK
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
IO
output current
VO = 0.5 V to VCC + 0.5 V
0.5
+7.0 V
-
20 mA
-
20 mA
-
25 mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
SO16 package
(T)SSOP16 package
-
50
65
[1]
-
[1]
-
50 mA
-
mA
+150 C
500 mW
500 mW
[1] For SO16 packages: above 70 C the value of Ptot derates linearly at 8 mW/K.
For (T)SSOP16 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K.
74HC161
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 4 January 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
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