HEF4518BP,652 查看數據表（PDF） - NXP Semiconductors.
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HEF4518BP,652 Datasheet PDF : 14 Pages
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Nexperia
HEF4518B
Dual BCD counter
a. Input waveforms
9,
QHJDWLYH
SXOVH
9
9,
SRVLWLYH
SXOVH
9
90
WI
WU
90
W:
90
WU
WI
90
W:
DDM
9''
9,
*
92
'87
57
&/
DDJ
b. Test circuit
Fig 6.
Test data is given in Table 9.
Definitions for test circuit:
DUT = Device Under Test;
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Test circuit for switching times
Table 9. Measurement points and test data
Supply voltage
Input
VDD
VI
5 V to 15 V
VDD
VM
0.5VI
tr, tf
20 ns
Load
CL
50 pF
HEF4518B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 19 April 2016
© Nexperia B.V. 2017. All rights reserved
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