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MAX7490CEE 查看數據表(PDF) - Maxim Integrated

零件编号
产品描述 (功能)
生产厂家
MAX7490CEE
MaximIC
Maxim Integrated 
MAX7490CEE Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
Dual Universal Switched-Capacitor Filters
Table 3. Suggested External Op Amps
PART
MAX4281
MAX4322
MAX4130
MAX4490
GBW (MHz)
2
5
10
10
SLEW RATE (V/μs)
0.7
2.0
4.0
10.0
ISUPPLY/AMP (mA)
0.5
1.1
1.15
2.0
PIN-PACKAGE
5 SOT23
5 SOT23
5 SOT23
5 SOT23
Mode 3A Design Equations
fO = fCLK R2
100 R4
fn = fCLK RH
100 RL
Q = R3 R2
R2 R4
HOHP = R2
R1
HOLP = R4
R1
HOBP = R3
R1
HON1(f
0Hz)
=
RG
R4
⎜⎟
RL R1
HON2 (at
f
=
fCLK
/ 2)
=
RG
R2
⎜⎟
RH R1
Note: When the passband gain error exceeds 1dB, the
use of capacitor CC between the lowpass output and
the inverting input will reduce the gain error. The value
can best be determined experimentally. Typically, it
should be about 5pF/dB (CC-MAX = 15pF).
Offset Voltage
Switched-capacitor integrators generally exhibit higher
input offsets than discrete RC integrators. The larger
offset is mainly due to the charge injection of the CMOS
switches into the integrating capacitors. The internal op
amp offset also adds to the overall offset value. Figure
8 shows the input offsets from a single 2nd-order sec-
tion. Table 4 lists the formula for the output offset volt-
age for various modes and output pins.
Power Supplies
The MAX7490 operates from a single +5V supply, and
the MAX7491 operates from a single +3V supply.
Bypass VDD to GND with at least a 0.1µF capacitor.
VDD should be isolated from other digital or high-volt-
age analog supplies. If dual supplies are required, con-
nect the COM pin to the system ground and the GND
pin to the negative supply. Figure 9 shows an example
of dual-supply operation. Single-supply and dual-sup-
ply performances are equivalent. For dual-supply oper-
ation, drive CLK, SHDN, and EXTCLK from GND (which
is now V-) to VDD. If using the internal oscillator in dual-
supply mode, COSC can be returned to either GND or
the actual ground voltage. Use the MAX7490 for ±2.5V
and use the MAX7491 for ±1.5V.
For most applications, a 0.1µF bypass capacitor from
COM to GND is sufficient. If the VDD supply has signifi-
cant 60Hz energy, increase this capacitor to 1µF or
greater to provide better power-supply rejection.
INV
VOS1
COM
N/HP
BP
LP
+
Σ
VOS2
-
VOS3
S
Figure 8. Block Diagram of a 2nd-Order Section Showing the Input Offsets
14 ______________________________________________________________________________________

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