X25163V14 查看數據表（PDF） - Xicor -> Intersil

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X25163V14

Programmable Watchdog Timer & VCC Supervisory Circuit w/Serial E2PROM

Xicor -> Intersil 

X25643/45

X25323/25

X25163/65

Figure 2. Read Status Register Sequence

CS

SCK

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14

INSTRUCTION

SI

SO

HIGH IMPEDANCE

DATA OUT

76543210

MSB

7036 FRM 04

Figure 3. Write Enable Latch Sequence

CS

SCK

01234567

SI

HIGH IMPEDANCE

SO

7036 FRM 05

6

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