W83697 查看數據表（PDF） - Winbond

零件编号

产品描述 (功能)

生产厂家

W83697

WINBOND I/O

Winbond 

W83697HF/F

TABLE OF CONTENTS

GENERAL DESCRIPTION .....................................................................................................1

1. PIN DESCRIPTION .....................................................................................................5

1.1 LPC INTERFACE................................................................................................................................................................ 6

1.2 FDC INTERFACE................................................................................................................................................................ 7

1.3 MULTI-MODE PARALLEL PORT...................................................................................................................................8

1.4 SERIAL PORT INTERFACE............................................................................................................................................ 13

1.5 INFRARED PORT............................................................................................................................................................. 14

1.6 FRESH ROM INTERFACE .............................................................................................................................................. 14

1.7 HARDWARE MONITOR INTERFACE ........................................................................................................................ 15

1.8 GAME PORT & MIDI PORT........................................................................................................................................... 16

1.9 POWER PINS..................................................................................................................................................................... 17

2. LPC (LOW PIN COUNT) INTERFACE.....................................................................18

3. FDC FUNCTIONAL DESCRIPTION........................................................................19

3.1 W83697HF FDC................................................................................................................................................................. 19

3.1.1 AT interface...............................................................................................................................................................19

3.1.2 FIFO (Data)..............................................................................................................................................................19

3.1.3 Data Separator.........................................................................................................................................................20

3.1.4 Write Precompensation...........................................................................................................................................20

3.1.5 FDC Core ..................................................................................................................................................................21

3.1.6 FDC Commands .......................................................................................................................................................21

3.1.7 FDC Commands .......................................................................................................................................................21

3.2 REGISTER DESCRIPTIONS ............................................................................................................................................ 34

3.2.1 Status Register A (SA Register) (Read base address + 0)...............................................................................34

3.2.2 Status Register B (SB Register) (Read base address + 1)...............................................................................36

3.2.3 Digital Output Register (DO Register) (Write base address + 2) ..................................................................38

3.2.4 Tape Drive Register (TD Register) (Read base address + 3)..........................................................................38

3.2.5 Main Status Register (MS Register) (Read base address + 4)....................................................................... 39

Publication Release Date: Feb. 2002

-I -

Revision 0.70

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