VG3617161ET-7 查看數據表（PDF） - Vanguard International Semiconductor

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VG3617161ET-7

CMOS Synchronous Dynamic RAM

Vanguard International Semiconductor 

VIS

2.Truth Table

2.1 Command Truth Table

VG3617161ET

1,048,576 x 16 - Bit

CMOS Synchronous Dynamic RAM

FUNCTION

Device deselect

No operation

Mode register set

Bank activate

Read

Read with auto precharge

Write

Write with auto precharge

Precharge select bank

Precharge all banks

Burst stop

Symbol

DESL

NOP

MRS

ACT

READ

READA

WRIT

WRITA

PRE

PALL

BST

CKE

n-1 n

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

X

A9-

CS RAS CAS WE A11 A10 A0

H

X

X

X

X

X

X

L

H

HH

X

X

X

L

L

L

L

L

L

V

L

L

H

H BS(2) Row Row

L

H

L

H BS(2)

L

Col(1)

L

H

L

H BS(2)

H

Col(1)

L

H

L

L

BS(2)

L

Col(1)

L

H

L

L

BS(2)

H

Col(1)

L

L

H

L

BS(2)

L

X

L

L

H

L

X

H

X

L

H

H

L

X

X

X

Note: (1) Column address: A0~A7

(2) BS: Bank Select. L means Bank A and H means Bank B.

2.2 DQM Truth Table

FUNCTION

Data write/output enable

Data mask/output disable

Upper byte write enable/output enable

Lower byte write enable/output enable

Upper byte write inhibit/output disable

Lower byte inhibit/output disable

Symbol

ENB

MASK

ENBU

ENBL

MASKU

MASKL

CKE

n-1

n-1

H

X

H

X

H

X

H

X

H

X

H

X

DQM

UDQM LDQM

L

H

L

X

X

L

H

X

X

H

2.3 CKE Truth Table

Current State

Activating

Any

Clock suspend

Idle

Idle

Self refresh

Function

Clock suspend mode entry

Clock suspend

Clock suspend mode exit

CBR refresh command

Self refresh entry

Self refresh exit

Idle

Power down

Power down entry

Power down exit

Symbol

REF

SELF

CKE

n-1 n

HL

LL

LH

HH

HL

LH

LH

HL

LH

CS RAS CAS WE

XX

X

X

XX

X

X

XX

X

X

L

L

L

H

L

L

L

H

L

H

H

H

HX

X

X

XX

X

X

XX

X

X

Add-

ress

X

X

X

X

X

X

X

X

X

H : High level, L : Low level, X : high or Low level(Don’t care), V : Valid Data input

Document:1G5-0189

Rev.1

Page 9

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