µ PD63335
2.1.15
2.1.16
2.1.17
2.1.18
2.1.19
DAC master volume registers (14h, 15h)......................................................................................38
MONO output master volume register (16h) ................................................................................39
Path select register (17h) ...............................................................................................................40
Power down control register (18h)................................................................................................41
Warm reset register (7Fh) ..............................................................................................................43
3. ELECTRICAL SPECIFICATIONS..........................................................................................................................44
4. APPLICATION CIRCUIT EXAMPLE ....................................................................................................................51
5. RECOMMENDED LAND PATTERN.....................................................................................................................52
6. PACKAGE DRAWING ...........................................................................................................................................53
7. RECOMMENDED SOLDERING CONDITIONS....................................................................................................54
Data Sheet S15003EJ6V0DS
7